The present invention relates to electrostatic discharge (“ESD”) protection devices. More particularly, the invention relates to ESD protection devices for integrated circuits.
Integrated circuits (“ICs”) can be damaged by large, high-frequency currents produced during an ESD event. ESD events are caused by a variety of sources. For example, a packaged IC can acquire a charge when being held by a person whose body is electrostatically charged. An ESD event occurs when the person inserts the IC into a socket and one or more of the IC's pins contact the grounded terminals of the socket. This type of event is known as a human body model (“HBM”) ESD event. A second ESD event, known as a machine model (“MM”) ESD event, is caused by contact with metallic objects. A third ESD event is a charged device model (“CDM”) ESD event.
ESD protection circuits are often added externally to IC chips to reduce damage caused by ESD events. Many conventional ESD protection schemes for ICs employ peripheral dedicated circuits to carry the ESD currents from a pin or pad of a device to ground by providing a lower impedance path. The direction that current from an ESD event flows depends on the polarity of an ESD strike (e.g., positive or negative). The polarity of the ESD strike is determined from the polarity of the voltage on an IC pin relative to a ground or a supply voltage terminal. In both positive and negative ESD events, current may flow through circuitry within the IC that is vulnerable to large currents.